Smith chart explorer
Plot a load, change its representation and compare saved points on the impedance Smith chart.
- VSWR
- 2.16 : 1
- Return loss
- 8.69 dB
Changing representation keeps the same load.
Changing Z₀ keeps the entered load fixed and moves its reflection point. Positive X is inductive; negative X is capacitive.
Normalized impedance grid; changing it keeps the load and Γ fixed. Click or drag to set Γ. Keyboard: arrows move, Shift gives finer steps, Home returns to match.
- Load impedance Z
- 100 + j25 Ω
- Complex reflection Γ
- 0.35 + j0.11
- VSWR
- 2.16 : 1
- Return loss
- 8.69 dB
More measurements
Admittance & normalized values
- Load admittance Y
- 9.41 times ten to the power -3 − j2.35 times ten to the power -3 S
- Normalized impedance z = Z/Z₀
- 2 + j0.5
- Normalized admittance y = YZ₀
- 0.47 − j0.12
Reflection & power
- Reflection magnitude |Γ|
- 0.37
- Reflection phase
- 17.1 °
- Reflected incident power
- 13.51 %
Model & assumptions
The chart plots reflection. To read a physical load on its grid, first normalize impedance in ohms or admittance in siemens to the positive real reference :
Lowercase and have no units. The selected grid lets you read the same physical load as normalized impedance or admittance.
Both descriptions give the same complex reflection coefficient and therefore the same marker position:
The centre is a match, where ; passive loads lie on or inside the unit circle. The admittance grid is rotated 180° from the impedance grid. Positive reactance is above the axis; positive susceptance is below it.
Switching input representation preserves the load. Changing holds entered impedance or admittance fixed, or holds reflection fixed in reflection mode. Saved loads retain their physical impedance and are replotted at the current reference. Compare passive loads at the same reference plane with a positive real reference impedance. This single-point model does not predict bandwidth, line transformation or real component loss.
Moving the marker keeps the selected input representation whenever it has finite coordinates. Generated input values show at most two decimals; the marker, calculations and saved loads retain full precision until you edit that field. An explicit open or short preset uses reflection coordinates if the selected representation is unbounded. The optional dashed circle passes through the current reflection point and has the same VSWR everywhere on it; it is not a matching target. Saved-load names are labels only. Exports retain the selected grid, current reference, enabled circle and current/saved markers, with each saved reference identified in the legend. Keyboard users can focus the chart, move with the arrow keys, hold Shift for finer steps and press Home for a match.
Match this load uses the current physical load and real reference resistance to calculate an ideal L-network at your design frequency. The schematic reads input to load; the chart walks from the load back toward the input, applying the component nearest the load first. Series parts add reactance; shunt parts add susceptance:
For an inductor, and ; for a capacitor, and . The path varies that component’s added reactance or susceptance at the selected frequency; it is not a frequency sweep. Circuit input results describe the complete network looking toward the load.
Changing the load, reference, frequency or components evaluates the same physical parts. Recalculate match or selecting an L-network solution deliberately calculates new values. Calculated component values show at most two decimals while retaining full precision until edited; copying includes that precision. An ideal match means the computed input equals the reference within numerical precision, not a measured return-loss specification. Synthesis requires positive load resistance; open, short and purely reactive loads cannot acquire positive resistance through lossless L and C alone. Real component Q, self-resonance, layout, ratings, bandwidth and common-mode, imbalance or balun behaviour are outside this model.
Differential mode describes the complete port across + and −: , where and the currents in the two legs are equal and opposite. Enter the full differential load and real differential reference . The Smith chart geometry stays the same:
100 Ω is an optional reference preset, not a requirement. Changing port type keeps the entered numerical load and reference values and changes their interpretation; it does not convert a measured single-ended port into a differential measurement. Existing valid component values are converted to preserve their equivalent circuit, without resynthesizing.
The balanced network places equal series parts in both legs and connects bridge parts directly across the pair. Each series value field is the physical value of one part; for example, L1± controls L1+ and L1− together. One chart path represents that symmetric pair. Relative to the equivalent full differential one-port circuit:
The pair’s impedances add in series; bridge values remain unchanged. A bridge capacitor therefore acts across the full differential voltage, while each series part carries the same differential current. Saved loads retain their port type; the chart and image legend show the selected type, and Use load restores the saved convention with the current numerical reference. This ideal symmetric model predicts differential input matching only. It does not evaluate common-mode impedance, imbalance, mode conversion or a single-ended-to-differential balun.
For example, a 100 Ω load with a 50 Ω reference is z = 2 and y = 0.5. Both place the marker at Γ = 1/3 and give VSWR 2.
Does a result look wrong? Report a calculation issue
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